Open Source Summit North America 2022

In embedded applications which include a programmable logic (PL) portion, be it for clock-synchronous signalling or massively parallel data handling, the question arises of how to exchange information with a Linux-based host processing system (PS). The corresponding hardware interconnect can assume many forms: if the PS takes on a purely supervisory role, low-bandwidth UART/SPI interfaces may be employed. Integrated FPGA-SoC devices typically leverage the on-chip AXI, optionally with DMA. Finally, PCIe can be used for high-throughput connectivity. This presentation uses multiple variants of a tabletop 3D laser scanner project to highlight the software components involved at the PL-PS interface, from RTL code to device drivers and user space functionality. The project's workloads, comprising camera frame acquisition, CV algorithms such as corner detection and finally point cloud calculation, can be freely distributed between PL and PS, imposing varying bandwidth requirements on the interconnect. Special emphasis will be placed on possible model-based generation of required source code and on the re-usability of software components across platforms from different vendors.

This BoF provides an open forum for the Embedded Linux community to ask questions and discuss issues with the Yocto Project and OpenEmbedded community. We open with a Yocto Project summary and OpenEmbedded State of the Union.